Wafer Thinning Process
Summary:
Materials and Technologies Corp. has developed a process to thin semiconductor wafers to thicknesses as low as 50 microns. This is the most cost-effective high-yield approach known to thinning large-area, high-quality substrates with no front-side damage. Originally created as a way to help build small semiconductor chips for BMDO radar applications, this process is now being offered on a semi-automated scale. Although M&T also sells the semi-automated system itself, it is working towards selling fully automated thinning systems to large semiconductor manufacturers. The company is looking for equity investors to build and market the first beta system.
Technology Description:
Materials and Technologies Corp.(M&T; Poughkeepsie, NY) has developed a process to thin semiconductor wafers to thicknesses as low as 50 microns. This is the only cost-effective high-yield approach known to thinning large-area, high-quality substrates with no front-side damage. The process is single-sided, meaning the side of the wafer that is not being thinned is not touched by the solution. The wafers can be thinned to 50 microns, paving the way for cheaper, smaller microelectronic devices and applications.
Present day wafer thinning processes have difficulty achieving the levels of thinness needed for next-generation microelectronics and microelectromechanical systems (MEMS). M&T’s patented process, called dynamic confinement technology (DCT), utilizes fluid dynamics to confine solutions that “eat away,” or etch a wafer surface. This process has been qualified to thin wafers, which are usually 625-microns thick, down to as thin as 50 microns, and can work with virtually all semiconductor materials.
DCT has many advantages. Single-sided processing is an enabling advantage to MEMS and optoelectronic devices, which require a thinning method that does not affect the side of the wafer with structures or devices already on it, something conventional thinning processes can not offer. Another advantage is that the process does not create subsurface damage, a requirement for applications that are repeatedly heated and cooled or subject to mechanical stress, as subsurface damage leads to cracks or failure under these circumstances. A third advantage is its high yield. There are other processes that can thin wafers to equivalent levels, but they involve a two-step process—grinding down the wafer chemically to a certain level and then chemically thinning the remainder. Such grinding techniques, however, produce low yields (or the number of wafers successfully produced). Low yields drive up the costs of chip production, because more wafers must be produced. A fourth advantage is the system’s capital cost and cost of ownership, which can be a fraction of other comparative tools.
MDA Origins:
M&T developed its wafer thinning process to aid in its BMDO SBIR effort to produce wide bandgap silicon carbide (SiC) substrates for high power, high frequency radar applications. A thinning process that would strip away the sacrificial layers of SiC substrates was required, but not commercially available.
Spinoff Applications:
The most immediate market for M&T’s wafer thinning process may be for smart card manufacturers. Smart card use is predicted to take off in the United States and is already gaining widespread acceptance in Europe. Embedded memory chips in smart cards must as thin as possible to be comfortably placed in a wallet or pocket. The chips also must be cheap, so the thinning process requires a high yield to keep costs down, and the acquisition and ownership costs of the thinning systems themselves must be low.
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Another potential market is for M&T’s wafer thinning process is high performance ''back-imaging'' charge-coupled devices (CCDs), used in applications such as digital cameras for deep space astronomy. A back-imaging CCD produces superior resolution compared with regular CCDs. This CCD detects wavelength from its back, rather than the front where the component connections exist that hamper resolution levels. With these CCDs, the thinner the substrate, the more photons it allows through. However, back-imaging CCDs are extremely expensive to manufacture as the yield for making these chips tends to be very low. M&T’s process can produce higher yields and lowest overall manufacturing costs, thereby driving down the cost of making the devices and opening up markets, such as digital cameras, that previously are now dominated by conventional CCDs.
Another application that might benefit from M&T’s wafer thinning process would be MEMS. The MEMS market is expected to grow 20 percent annually over the next ten years. In particular, MEMS accelerometers and pressure sensors are quickly replacing standard-sized versions, as they are smaller, lighter, and cheaper. M&T will further reduce costs and speed production.
Commercialization:
At the present time, M&T’s wafer thinning process is used by research and development labs requiring only a limited number of wafers thinned. M&T’s lab has a semi-automated single wafer system that is optimal for smaller batch jobs. The costs range from one-third to one-tenth of other thinning processes, and, in many cases, M&T’s service is the only means of producing wafers below certain thickness.
M&T also sells the semi-automated wafer thinning system itself. Called the SSUWP-5T, this system is typically a fraction of the cost of other systems. The SSUWP-5T system is capable of throughputs of hundreds of wafers per hour. It is capable of thinning a 4'' silicon wafer to a total thickness of less than 10 micrometers. Custom thicknesses are easily produced from stock substrates.
M&T’s long-term plan is to sell fully automated thinning systems to major semiconductor manufacturers such as Motorola and Intel. Such companies would require class 10 compliant, robotic systems that can turn out thousands of wafers a day. They could then be used in a wide variety of micro-electronics applications, such as personal digital assistants that can fit on a wrist watch. M&T’s main focus is finding the capital needed to produce fully automated next-generation wafer thinning systems.
Company Profile:
M&T was incorporated in 1992. The company wants to
become a leader in developing single-sided wafer processing systems. It employs between
five and ten people and is located in Poughkeepsie, NY.
Contact Information:
Dr. Ricardo I. Fuentes
Materials and Technology Corp.
341 Sheafe Road
Poughkeepsie NY 12601
Tel:845-463-2799
Fax:845-463-2786
email: fuentes@matech.com
web: http://www.matech.com
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